The present invention relates to a semiconductor integrated circuit device and methods for production thereof. More particularly, the invention relates to a semiconductor integrated circuit device having a redundancy circuit arrangement such as a static RAM (random access memory) incorporating redundancy technology, the RAM combining a bipolar transistor with a CMIS (complementary metal-insulator-semiconductor) circuit arrangement.
Recent years have seen significant improvements in the circuit performance and storage capacity of semiconductor circuit devices. These improvements, however, are accompanied by growing difficulties in keeping the yield of semiconductor chips higher than feasible levels. The increases in circuit performance and storage capacity necessitate making semiconductor circuit elements and wires smaller than ever before, whereas the semiconductor chips continue to grow in size. Such developments have resulted in unacceptably high rates of defect incidence in the semiconductor chips through their exposure to intruding impurities.
Redundancy technology (fault remedy technology) constitutes a means for minimizing the defect-induced drop in the yield of semiconductor chips. Implementing the redundancy technology in the semiconductor chip entails incorporating redundant backup elements therein. If the semiconductor chip develops a faulty part, the backup element corresponding to that part takes over, thereby keeping the integrity of the chip intact.
The switching between faulty parts and their backup elements in the semiconductor chip is accomplished by the melting of fuses constituting part of the redundancy circuit therein. The fuses are melted, illustratively, by use of laser means or electrical means.
The fuses are illustratively made of polysilicon. For the ease of production, these fuses are patterned in, for example, a MOSFET (metal-oxide-semiconductor field-effect transistor) at the same time as the gate electrodes thereof are formed into a pattern. In such cases, the fuses are formed in the lowest of the layers making up the semiconductor chip.
A fuse is melted by laser means illustratively as follows: The upper insulation film, a predetermined wiring region or other suitable portion of the target fuse is first removed therefrom for partial exposure. Then a laser beam is irradiated at the exposed area of the fuse for melting.